EM250-BBRD-R【PDF 27/124 页】EM250 BREAKOUT BOARD

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EM250

5 Functional Description—Application Modules

In Application Mode, access to privileged areas is blocked while access to application-specific modules such as

GPIO, Serial Controllers (SC1 and SC2), General Purpose Timers, ADC, and Event Manager are enabled.

5.1

GPIO

The EM250 has 17 multi-purpose GPIO pins that can be configured in a variety of ways. All pins have the

following programmable features:

?

?

?

Selectable as input, output, or bi-directional.

Output can be totem-pole, used as open drain or open source output for wired-OR applications.

Can have internal pull-up or pull-down.

The information flow between the GPIO pin and its source are controlled by separate GPIO Data registers. The

GPIO_INH and GPIO_INL registers report the input level of the GPIO pins. The GPIO_DIRH and GPIO_DIRL

registers enable the output signals for the GPIO Pins. The GPIO_PUH and GPIO_PUL registers enable pull-up

resistors while GPIO_PDH and GPIO_PDL registers enable pull-down resistors on the GPIO Pins. The GPIO_OUTH

and GPIO_OUTL control the output level.

To configure a GPIO as an open source output, the GPIO_OUT register should be set to 0, the GPIO_PD register

bit should be enabled, and the GPIO_DIR register can be used for the data. To configure a GPIO as an open

drain, the GPIO_OUT register should be set to 0, the GPIO_PU register bit should be enabled, and the

GPIO_DIR register can be used for the data.

Instead of changing the entire contents to the OUT/DIR registers with one write access, a limited change can

be applied. Writing to the GPIO_SETH/L or GPIO_DIRSETH/L register changes individual register bits from 0

to 1, while data bits that are already 1 are maintained. Writing to the GPIO_CLRH/L or GPIO_DIRCLRH/L

register changes individual register bits from 1 to 0, while data bits that are already 0 are maintained.

Note that the value read from GPIO_OUTH/L , GPIO_SETH/L , and GPIO_CLRH/L registers may not reflect the

current pin state. To observe the pin state, the GPIO_INH/L registers should be read.

All registers controlling the GPIO pin definitions are unaffected by power cycling the main core voltage

(VDD_CORE).

VDD_PADS

GPIO_PUH/L

Alternate

GPIO_DIRSETH/L

GPIO_DIRH/L

GPIO_DIRCLRH/L

GPIO_SETH/L

GPIO_OUTH/L

GPIO_CLRH/L

GPIO_CFG

GPIO

functions

Note (1)

Note (2)

GPIO[16:0]

GPIO_PDH/L

GPIO_INH/L

Note (1) : Pull-up resistor is always disabled for Alternate GPIO functions ADC 0,

ADC1, ADC2, ADC3, VREF_OUT, PTI_EN and PTI_DATA.

Note (2) : Pull-down resistor is always disabled for Alternate GPIO functions

VREF_OUT, PTI_EN and PTI_DATA.

Figure 5. GPIO Control Logic

Page 27

120-0082-000V Rev 1.1

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相关代理商/技术参数

EM250-COMP-XIDE 制造商:Silicon Laboratories Inc 功能描述:COMPILER XIDE FOR EM250 1SEAT

EM250-DEV 功能描述:KIT DEV FOR EM250 RoHS:否类别:RF/IF 和 RFID >> RF 评估和开发套件，板系列:InSight 标准包装:1 系列:- 类型:GPS 接收器频率:1575MHz 适用于相关产品:- 已供物品:模块其它名称:SER3796

EM250-EK-R 功能描述:KIT EVAL EM250 RF TEST RoHS:是类别:RF/IF 和 RFID >> 过时/停产零件编号系列:InSight 标准包装:1 系列:- 类型:用于 200/300 系列的欧盟开发套件适用于相关产品:Zensys RF 模块所含物品:开发板，模块，编程器，软件，线缆，电源其它名称:703-1019Q3225667

EM250-JMP-R 功能描述:KIT JUMP START FOR EM250 RoHS:否类别:RF/IF 和 RFID >> RF 评估和开发套件，板系列:JumpStart 标准包装:1 系列:- 类型:GPS 接收器频率:1575MHz 适用于相关产品:- 已供物品:模块其它名称:SER3796

EM250-RCM-R 功能描述:EM250 RCM BOARD RoHS:是类别:RF/IF 和 RFID >> RF 评估和开发套件，板系列:- 标准包装:1 系列:- 类型:GPS 接收器频率:1575MHz 适用于相关产品:- 已供物品:模块其它名称:SER3796

EM250-RTR 功能描述:IC ZIGBEE SYSTEM-ON-CHIP 48-QFN RoHS:是类别:RF/IF 和 RFID >> RF 收发器系列:EM250 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:30 系列:- 频率:4.9GHz ~ 5.9GHz 数据传输率 - 最大:54Mbps 调制或协议:* 应用:* 功率 - 输出:-3dBm 灵敏度:- 电源电压:2.7 V ~ 3.6 V 电流 - 接收:* 电流 - 传输:* 数据接口:PCB，表面贴装存储容量:- 天线连接器:PCB，表面贴装工作温度:-25°C ~ 85°C 封装/外壳:68-TQFN 裸露焊盘包装:管件

EM250-STACK-R 制造商:Silicon Laboratories Inc 功能描述:EM250 BOARD STACK (RCM + BREAKOUT) - Boxed Product (Development Kits) 制造商:Silicon Laboratories Inc 功能描述:BOARD STACK EM250 RCM & BREAKOUT

EM25-12V-DC 制造商:ECLIPSE MAGNETICS 功能描述:HOLDING ELECTRO MAGNET